FIG. 49 is a block diagram of a conventional liquid crystal display device showing an equivalent circuit of a liquid crystal panel and a drive circuit for driving this liquid crystal panel. This liquid crystal display device comprises a liquid crystal panel 14, an upper signal line drive circuit 15, a lower signal line drive circuit 16, a scanning line drive circuit 17, a control circuit 18, and a drive power source circuit 19.
The liquid crystal panel 14 has plural signal lines provided in the y-direction (vertical direction) and plural scanning lines provided in the x-direction (horizontal direction). The signal line is composed of upper signal line 10 and lower signal line 11 divided equally in the vertical direction, and the number of upper and lower signal lines 10, 11 is M each. The number of scanning lines 12 is 2N. The addresses of the upper and lower signal lines 10, 11 are supposed to be Y1 to YM, the addresses of the upper half scanning line 12 to be X1 to XN, and the addresses,of the lower half scanning line 12 to be XN+1 to X2N.
In the liquid crystal panel 14 of such simple matrix type, the upper signal lines 10, lower signal lines 11, and scanning lines 12 are arranged in a matrix, and a pixel 13 is formed each at the intersection of upper signal line 10 and scanning line 12, and the intersection of lower signal line 11 and scanning line 12. The pixel 13 has a liquid crystal cell and a transparent pixel electrode, or a driving terminal including liquid crystal cell and transparent pixel electrode, and its capacitance is determined by the liquid crystal cell and pixel electrode. Herein, the capacitance of the pixel 13 is called the pixel capacitance. Incidentally, in the case of a TFT type liquid crystal panel, for example, the pixel includes TFT, liquid crystal cell and others.
This liquid crystal panel 14 is driven as being divided into upper and lower halves. That is, the upper signal line 10 is driven by an upper signal line drive circuit 15, and the lower signal line 11 by a lower signal line drive circuit 16. The scanning line 12 is driven from one end side of the scanning line 12 by one scanning line drive circuit 17.
The liquid crystal panel 14 shown in FIG. 49 is driven from the left end of the scanning line 12, and such driving method of driving each pixel 13 by applying a driving voltage to the scanning line 12 from one end is called the scanning line one-end drive. The upper signal line drive circuit 15 and lower signal line drive circuit 16 are disposed around the liquid crystal panel 14 depending on the number of upper signal lines 10 and lower signal lines 11 and the number of scanning lines 12.
The control circuit 18 is a control circuit for controlling the upper signal line drive circuit 15, lower signal line drive circuit 16, and scanning line drive circuit 17 on the basis of an input image signal. The drive power source circuit 19 is a circuit for supplying a driving voltage to the upper signal line drive circuit 15, lower signal line drive circuit 16, and scanning line drive circuit 17. Herein, there are five driving voltages, V(+), V(-), VH, Vref, and VL, and the pixels 13 are driven by the combination thereof.
The scanning line drive circuit 17, for upper and lower divided driving of signal lines, scans parallel the scanning lines 12 of addresses X1 to XN and scanning lines 12 of addresses XN+1 to X2N. That is, the scanning line drive circuit 17 starts scanning simultaneously from the scanning lines 12 of addresses X1 and XN+1, and continues to scan sequentially at the same timing from address X1 to XN, and from address XN+1 to X2N.
As shown in FIG. 50, the scanning line drive circuit 17 scans the scanning lines 12 sequentially from address X1 to X2N, applies a driving voltage of V(+) or V(-) to a selected scanning line 12, and applies a operation reference voltage Vref to non-selected scanning lines 12. The upper signal line drive circuit 15 and lower signal line drive circuit 16 drive the signal lines 10, 11 at signal line driving voltages VH, VL which are first scanning pulses, depending on the control signal of the control circuit 18. Output sections of upper signal line drive circuit 15 and lower signal line drive circuit 16 are composed of two analog switches for selecting and issuing one out of two values (VH, VL). The relation of driving voltages V(+), V(-), VH, VL, and Vref should satisfy the following formula (1). EQU VH-Vref=Vref-VL V=V(+)-Vref=Vref-V(-) (1)
where V is the amplitude of the scanning line driving voltage applied to the liquid crystal cell of each pixel 13.
The upper signal line drive circuit 15 in FIG. 49 issues a signal line driving voltage of either VH or VL to M upper signal lines 10 simultaneously in every horizontal scanning, corresponding to the scanning lines from address X1 to XN. The lower signal line drive circuit 16 issues a signal line driving voltage of either VH or VL to M lower signal lines 11 simultaneously in every horizontal scanning, corresponding to the scanning lines from address XN+1 to X2N. The scanning line drive circuit 17 selects the scanning line 12 sequentially in every horizontal scanning, and issues a scanning line driving voltage V(+) or V(-), which is a second scanning pulse, to the selected scanning line 12 from the left side end, and issues an operation reference voltage Vref to the non-selected scanning lines 12. Therefore, the output section of the scanning line drive circuit 17 is composed of three analog switches for selecting and issuing one out of three values, V(+), V(-), and Vref. The output resistance of these three analog switches (also called ON resistance) is named Ro.
In this way, the liquid crystal panel 14 is driven sequentially. As shown in FIG. 49, if the liquid crystal panel 14 is composed of upper and lower screens, the two screens are scanned simultaneously. Accordingly, the output ends of the upper signal line drive circuit 14 and lower signal line drive circuit 15 are provided by the same number.
In such conventional liquid crystal display device of one-end driving of scanning lines, a delay occurs in the driving voltage of each pixel due to presence of wiring resistance r of scanning line 12 and pixel capacitance c. Accordingly, the effective voltage differs slightly in each pixel from the driving end to terminal end of scanning line 12, and therefore the brightness of each pixel varies slightly from the driving end to terminal end of scanning line 12. Such luminance unevenness is called a lateral luminance error. Moreover, crosstalk occurs due to distortion of driving voltage of pixels. This is called lateral crosstalk. Similarly, in driving of signal lines, a delay occurs due to wiring resistance of signal line and pixel capacitance, and the brightness of each pixel differs slightly from the driving end to terminal end of signal line, which is a longitudinal luminance error, and crosstalk is caused due to distortion of waveform by signal line driving. It is called longitudinal crosstalk.
Such lateral or longitudinal luminance error or crosstalk become larger as the liquid crystal display device has a wider screen, which was a serious cause of deterioration of picture quality. For development of driving method capable of eliminating the lateral or longitudinal luminance error and crosstalk, drive analysis including the structure of liquid crystal panel and drive circuit is indispensable. However, as for lateral or longitudinal luminance error, crosstalk, or delay time of driving current and driving voltage of scanning line or signal line, results of calculation and measured values did not coincide in the conventional drive analysis method. Further, it requires much time and cost for development of optimum driving method and optimum drive circuit.
The above problems are described in detail below. Herein, problems are analyzed by referring to an example of lateral luminance error and scanning line driving current in the liquid crystal panel 14 of simple matrix type. FIG. 50(A) is an output waveform diagram of upper signal line drive circuit 15 and lower signal line drive circuit 16 satisfying the relation of formula (1). FIG. 50(B) is an output waveform diagram of scanning line drive circuit 17. FIGS. 50(C), (D) are voltage waveform diagrams applied to the pixels 13 located at the driving end and terminal end, respectively. In the diagrams, TH refers to the horizontal scanning time, TV is the vertical scanning time, and N is 1/2 of total number of scanning lines.
Point (XN, Y1) denotes the pixel 13 at the intersection of the XN-th scanning line 12 and Y1-th signal lines 10, 11, and (XN, YM) is the pixel 13 at the intersection of the XN-th scanning line 12 and YM-th signal lines 10, 11. The pixel 13 at (XN, Y1) in FIG. 50(C) is at the driving end of the scanning line drive circuit 17, and the pixel 13 at (XN, YM) in FIG. 50(D) is at the terminal end of the scanning line drive circuit 17. Thus, the voltage applied to the pixels 13 differs between the driving end and the terminal end of the scanning line 12. The driving end is driven by an ideal waveform (a combined rectangular waveform), but at the terminal end of the scanning line 12, as shown in FIG. 50(D), a delay occurs, and the waveform is distorted at the rising edge of the rectangular waveform.
The fall time of the scanning line driving voltage is identical throughout the driving end to the terminal end in a same scanning line because the signal lines Y1 to YM are simultaneously driven by the upper and lower signal line drive circuits 15, 16, and is hence not related to occurrence of lateral luminance error. Signal line driving voltages VH, VL have a same delay time throughout the driving end to the terminal end in a same scanning line 12, and are hence not related to occurrence of lateral luminance error. Accordingly, in FIGS. 50(C) and (D), regarding the fall time of scanning line driving voltage to be 0, the signal line driving voltages VH, VL may be estimated to be ideal pulse waveforms. Moreover, if there is any change in the pixel capacitance due to driving voltage, it is not related to occurrence of lateral luminance error. Also change in pixel capacitance can be corrected later, and is hence assumed to be constant.
An equivalent circuit of the liquid crystal panel. 14 is shown in FIG. 2. Herein, the wiring resistance per pixel of upper signal line 10 and lower signal line 11 is supposed to be rs, the wiring resistance per pixel of scanning line 12 to be r, and the pixel capacitance of the pixel 13 linked to the scanning line 12 to be c. In the liquid crystal panel 14, 2(N-1) scanning lines other than the scanning line 12 selected by the scanning line drive circuit 17 are driven at operation reference voltage Vref, and the upper signal line 10 and lower signal line 11 are driven at operation reference voltage Vref or signal line driving voltage VH or VL. Accordingly, the driving end of 2(N-1) scanning lines 12, and the driving end of upper signal line 10 and lower signal line 11 are at the potential of Vref in average. Therefore, as electrical characteristics, the potential of one side of each pixel capacitance c is regarded to be Vref. Hence, as shown in FIG. 51 (A), one scanning line 12 is expressed by a distributed parameter circuit composed of wiring resistance r and pixel capacitance c (formed at intersections of addresses Y1 to YM). FIG. 51(A) shows a circuit in which M wiring resistances r and M pixel capacitance c are connected in ladder form. (Supposing the wiring resistance of signal line to be rs and the pixel capacitance linked to the signal line to be cs, one signal line is also expressed by a distributed parameter circuit, same as in FIG. 51(A), composed of N wiring resistances rs and N pixel capacitance cs.)
In the prior art, the liquid crystal panel was driven and analyzed by the equivalent circuit shown in FIG. 51(B). In this equivalent circuit, supposing the sum M.multidot.r of the scanning lines 12 to be RL and the sum M.multidot.c of the pixel capacitance c to be CL, the scanning lines 12 are expressed by a series circuit composed of resistance RL and pixel capacitance CL. FIG. 51(B) shows a circuit for driving the scanning lines 12 at voltage V, supposing the output resistance of the scanning line drive circuit 17 to be Ro and the analog switch built in the scanning line drive circuit 17 to be SW. In this equivalent circuit, the terminal end voltage of the scanning line 12 is expressed as terminal voltage Vcm of a capacitor having a capacitance value of CL. Supposing SW to be ON when t=0, and, Ro=0, Vcm is given in formula (2). EQU Vcm=V[1-exp{-t/(RL.multidot.CL)}]RL=M.multidot.r, CL=M.multidot.c (2)
In scanning line one-end driving, the effective voltage of the pixel capacitance c differs between the driving end and terminal end. Accordingly, the transmittance of liquid crystal cell differs in the lateral direction, and a lateral luminance error occurs in the screen of the liquid crystal display device. Due to this lateral luminance error, display unevenness of screen appears, and the picture quality deteriorates. The lateral luminance error is more obvious when the display screen is larger, and it has no practical problem in a liquid crystal display device of, for example, 12.1 inches in the diagonal length, but display unevenness is visually recognized in a 17-inch liquid crystal display device.
Supposing the driving waveform of the signal line drive circuit shown in FIG. 50(A) to be fs, and the driving waveform of the scanning line drive circuit shown in (B) to be fc, the driving waveform of the pixel 13 at the driving end shown in (C) is (fc+fs). The effective voltage Ve of the driving waveform (fc+fs) is obtained by integrating the value of (fc+fs).sup.2 dt over one period TV, dividing the integral value by the period, and extracting the square root of the obtained quotient. The effective value Vecl of the pixel voltage at the driving end of the scanning line 12 is obtained by formula (3).
Where, EQU Vecl=[(V+V/a).sup.2 /N+(N-1)(V/a).sup.2 /N].sup.(1/2)
V: amplitude of scanning line driving voltage PA1 N: 1/2 of total number of scanning lines PA1 a: ratio of amplitude of scanning line driving voltage (V=V(+)-Vref) and amplitude of signal line driving voltage (VH-Vref) EQU V=a(VH-Vref) (3) PA1 Lateral luminance error=70.5 mV .gamma.=0.975 PA1 Voltage Vecl=2.74V PA1 TH=27.8 .mu.S, TV=8.34 mS, c=0.26 pF PA1 r=1.5 .OMEGA., N=300, M=800.times.3, a=14.5 PA1 V=30.5V, V(+)=31.55V PA1 Lateral luminance error=96.2 mV PA1 .gamma.=0.963 PA1 Voltage Vecl=2.60V PA1 TH=28 .mu.S, TV=14.34 mS, c=0.19 pF PA1 r=1.5 .OMEGA., N=512, M=1280.times.3, a=15.5 PA1 V=32.5V, V(+)=33.55V
In formula (3), V denotes the scanning line driving voltage, and (V/a) refers to the signal line driving voltage, and therefore, supposing the signal line driving voltage to be an ideal pulse, to determine the effect of delay of the scanning line driving voltage at the terminal end, V in formula (3) must be replaced by Vcm in formula (2), but the calculation is complicated, and therefore it is approximated as follows: EQU .intg.(Vcm+V/a).sup.2.multidot.dt.apprxeq.(1+1/a).sup.2.intg.(Vcm).sup. 2.multidot.dt
Then, to determine the effective voltage Vecm of pixel at terminal end of the scanning line 12, the term of (V+V/a).sup.2 /N in formula (3) may be replaced by EQU {(V+V/a).sup.2 /TV}.multidot..intg.[1-exp{-t/RL.multidot.CL}].sup.2.multidot.dt
The integration is performed in the horizontal scanning period TH. Since the liquid crystal display device is designed to satisfy TV=N.multidot.TH, and TH&gt;&gt;CL.multidot.RL, the above formula is transformed into formula (4) by integrating from 0 to TH. ##EQU1##
Therefore, the effective voltage Vecl at driving end of the scanning line 12 and effective voltage Vecm at terminal end are expressed as shown in formula (5). EQU Vecl=[(V+V/a).sup.2 /N+{(N-1)(V/a).sup.2 /N}].sup.(1/2) Vecm=[{V+V/a).sup.2 /N}{1-1.5RL.multidot.CL/TH}+{(N-1)(V/a).sup.2 /N}].sup.(1/2) (5)
The lateral luminance error is determined by effective voltage Vecl-effective voltage Vecm. Furthermore, the ratio .gamma. of effective voltage Vecm at terminal end and effective voltage Vecl at driving end is as expressed in formula (6). ##EQU2##
From a&gt;&gt;1, then EQU .gamma..apprxeq.[1-1.5RL.multidot.CL/TH.multidot.a.sup.2 /(a.sup.2 +N-1)].sup.(1/2) (6)
The scanning line driving current I can be determined as follows. When the capacitor c is charged with v, the charge transfer by charging is v.multidot.c, and therefore supposing the number of scanning lines to be 2N, number of signal lines to be M, pixel capacitance of scanning line to be c, and vertical scanning time to be TH, formula (7) is obtained when the scanning line driving voltage is V(+) and V(-).
Drive current when driving voltage is V(+): EQU I(+)=(2N/TV)M.multidot.c{V(+)-VL}=2N.multidot.M.multidot.c{V(+)-VL}/(TV)
Drive current when driving voltage is V(-): EQU I(-)=2N.multidot.M c{V(-)-VH}/(TV) (7)
In the liquid crystal display devices of 12.1 inches and 17 inches in the screen diagonal length of liquid crystal panel, the value of the lateral luminance error (expressed in the difference of effective voltage) calculated from formulas (5) and (6), and the value of the scanning line driving current calculated from formula (7) in the condition of VH=-VL=2.1 V are shown below (calculation 1).
(1) In 12.1-inch liquid crystal display device PA0 Scanning line driving current I=1.42 mA (measured value=1.0 mA) PA0 Measuring condition PA0 (2) In 17-inch liquid crystal display device PA0 Scanning line driving current I=1.75 mA (measured value=0.97 mA) PA0 Measuring condition
In the above results, in the 12.1-inch liquid crystal display device, an effective voltage difference of 70.5 mV (lateral luminance error) is caused, whereas in the 17-inch liquid crystal display device, an effective voltage difference of 96.2 mV (lateral luminance error) is caused. Although variable with the display pattern, if the effective voltage difference of the liquid crystal is more than 10 mV, it can be distinguished by the human eye. Numerical expression of the distinguishable effective voltage difference is very difficult because the limit value differs in each display pattern and the human individual error is involved. However, the limit is generally considered to be somewhere between 10 and 15 mV, and at a double value of 20 to 30 mV, the lateral luminance error can be clearly distinguished regardless of the display pattern or human individual difference.
The above result of calculation is far more than the visually distinguishable value, and the lateral luminance error is sure to be recognized in both 12.1-inch and 17-inch liquid crystal display devices. Actually in the 12.1-inch device, if recognized visually, the error is small enough to be allowed practically. In this sense, the effective voltage difference is estimated in a range of 20 to 30 mV. In the 17-inch liquid crystal display device, there is an effect on the picture quality, and the effective voltage difference can be clearly recognized visually, and hence the effective voltage difference is estimated around 30 mV. It is not such a large value as 96 mV as in the result of calculation.
Furthermore, the calculation result of driving current of scanning line is much larger value than the measured value, and the error is significant. Similarly, the driving current of signal line can be determined, and the result of calculation is much larger than the measured value. Thus, in the equivalent circuit in FIG. 51(B), the result of calculation and measured value do not coincide, and when the number of pixels in the liquid crystal panel increases, it cannot be applied in drive analysis.
Thus, the lateral luminance error caused by delay in the scanning line driving voltage appears as display unevenness of screen, and the picture quality deteriorates. In one-end driving of scanning line 12, the lateral luminance error is not a practical problem in the 12.1-inch liquid crystal panel, but it is a serious problem in the 17-inch liquid crystal panel. Incidentally, when driving the signal line from one end, a longitudinal luminance error is caused by the delay time of the signal line driving voltage, which also results in unevenness in the screen. Development of liquid crystal display device free from lateral or longitudinal luminance error or crosstalk requires drive analysis of scanning lines and signal lines, but in the conventional method, as mentioned above, the result of drive analysis does not agree with the measured value.